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Hardware is interfaced to the SPI via three PORTD pins named SCK, MOSI, and MISO brought out to pins 7, 8, and 10 on the Wildcard Port Header (see Appendix B). If you are using the QScreen as a slave device and require the /SS signal for your external SPI hardware, configure one of the Port A pins on the Field Header as an input pin. Figure 4 is a pin diagram for both 25 pin RS485 pinout half duplex and full duplex pinout connectors. Note that the data is changed by the transmitting device one half clock cycle before it is valid. It comes in two versions, one with DC only, and another with a built-in rechargeable battery. This allows RS-485 to implement linear bus topologies using only two wires. If you are using the QScreen as a master device, each external SPI device will require a separate select line (/SS). Configured as a master device, the QScreen transmits bytes via the "master out/slave in" pin, MOSI. The CPOL and CPHA bits configure the synchronous clock polarity and phase and specify when valid data is present on the MISO and MOSI data lines. The SCK pin’s synchronous clock signal has configurable phase, polarity and baud rate so that it can interface to a variety of synchronous serial devices.

The SCK (serial clock) pin is a configurable synchronous data clock output. If the /SS pin of the master is an input and if a low input level is detected, the processor sets the MODF bit in the SPI status register a "mode fault" condition. The SPIE bit in the SPCR (SPI control register) enables SPI interrupt handling. Alternatively, the if the SPI interrupts are enabled, the SPI interrupt handler determines what caused the interrupt by reading the SPSR register to see which of the three status bits is set. The received data byte is accessed by reading SPDR data register. A write collision occurs when a byte is written to the SPI data register, SPDR, while data is being exchanged. A mode fault occurs when the SPI senses that a multimaster conflict (MC68HC11F1 Technical Data Manual, p.8-7) exists on the network as explained above in connection with the /SS input. The WCOL flag is set when a write collision occurs. Thus, resetting the SPIF flag is very simple.

After configuring the SPI system to communicate on a properly connected network of devices, sending and receiving data is as simple as writing and reading a register. In this section we will consider the most general and simple configurations. In some cases, however, rs485 cable a sophisticated network may have device groups on a network that use different clock configurations. There are many possible configurations of master/slave networks. There are a variety of ways the MOSI, MISO, SCK and /SS pins on your QScreen Controller can be connected. The DWOM bit (port D wired-or mode) should always be set to 0. Setting DWOM to 1 takes away the processor’s ability to pull the Port D signals high unless there is a pull-up resistor on each bit of the port. It is also an ideal choice for industrial equipment use due to its high speed, reliability and safety. For the QScreen, /SS is not used for SPI communication because it is used to control the direction of the RS485 transceiver; you can use any digital I/O line as a /SS signal. Serial communication also has a deterministic behaviour to avoid collisions of data packets, making it more reliable for a linkage system with many devices.

Professional 100m flex cable for RS485 (and Modbus) serial bus. These steps greatly reduce the chance that the communicating devices might be damaged by contention on the SPI bus. The QED-Forth kernel includes pre-coded drivers that configure and control the SPI for maximum speed data transfers. The /SS (active-low slave select) is typically used to enable data transfers by slave devices when it is active low. When the /SS input goes low, the slave (or QScreen in this case) transfers data in response to the SCK clock input that is initiated by the master. Note that the master device outputs the clock synchronization signal SCK to the slave’s SCK which is configured as an input. By setting this output LOW, the slave’s input /SS is pulled LOW. The arrows in the diagram point to pins configured as inputs, and originate from output pins. If the programmer has enabled the local interrupt mask for the SPI, an interrupt is recognized at this point.